november 2008 rev 1 1/7 LFTVS10-1F3 transil?, transient voltage suppressor features transient voltage suppressor electrostatic discharge protection electrical overstress protection unidirectional device low clamping factor v cl /v br fast response time very thin package: 0.605 mm rohs compliant complies with the following standards: iec 61000-4-2 level 4 ? 15 kv (air discharge) ? 8 kv (contact discharge) description the LFTVS10-1F3 is a single line diode designed specifically for the protection of integrated circuits in portable equipment and miniaturized electronic devices subject to esd and eos transient overvoltages. figure 1. pin configuration (bump side) figure 2. device configuration tm : transil is a trademark of stmicroelectronics flip chip (4 bumps) b 1 2 a a1 and a2 b1 and b2 www.st.com
characteristics LFTVS10-1F3 2/7 1 characteristics table 1. absolute maximum ratings (t amb = 25 c) symbol parameter test condition value unit p pp peak pulse power dissipation (10/1000 s pulse) t j initial = t amb 44 w peak pulse power dissipation (8/20 s pulse) 350 i fsm non repetitive surge peak forward current t p = 10 ms t j initial = t amb 11 a t stg storage temperature range -55 to +150 c t j maximum operating junction temperature 125 c table 2. electrical characteristics (t amb = 25 c) symbol parameter v br breakdown voltage i rm leakage current @ v rm v rm stand-off voltage v cl clamping voltage r d dynamic impedance i pp peak pulse current t voltage temperature coefficient v f forward voltage drop symbol test conditions min. typ. max. unit v br i r = 15 ma 10 v i rm v rm = 8 v 0.5 a v cl i pp = 1 a (1) 1. 8 / 20 s pulse waveform 13 v v f i f = 850 ma (2) 2. dc current not recommended for more than 5 s. even if diode failure mode is shor t circuit the bumps could exceed melting temperature and the comp onent disassembled from the board. 1.05 v t 810 -4 / c c line v r = 0 v, v osc = 30 mv, f = 1 mhz 200 pf i v i f i rm i pp v rm v f v br slope = 1/rd v cl
LFTVS10-1F3 characteristics 3/7 figure 3. relative variation of peak pulse power versus initial junction temperature figure 4. peak pulse power versus exponential pulse duration (typical value) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0 25 50 75 100 125 150 t (c) j p [t initial] / [t initial=25c] pp j j p pp p (w) pp 10 100 1000 10000 1 10 100 1000 t j initial = 25 c t (s) p figure 5. clamping voltage versus peak pulse current (typical values) figure 6. relative variation of leakage current versus junction temperature (typical values) figure 7. forward voltage drop versus peak forward current (typical values) figure 8. junction capacitance versus line voltage (typical values) 0.1 1.0 10.0 5 6 7 8 9 1011121314151617 i (a) pp v (v) cl -30 c 25 c 85 c pulse 8 / 20 s i [t ] / i [t =25c] rj rj 1 10 100 1000 25 50 75 100 125 v r =8v t (c) j 0.0001 0.001 0.01 0.1 1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i(a) fm v(v) fm t initial = -30 c j t initial = 25 c j t initial = 85 c j capacitance(pf) 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 012345678 f=1 mhz v osc =30mv rms t j =25c vr=0 to 8v voltage(v)
ordering information scheme LFTVS10-1F3 4/7 figure 9. breakdown voltage versus initial junction temperature (typical value) 2 ordering information scheme figure 10. ordering information scheme v (v) br 8.0 9.0 10.0 11.0 12.0 13.0 -40 -15 10 35 60 85 110 135 t ( c) j lf tvs 10 - 1 f3 low forward voltage transient voltage suppressor breakdown voltage number of lines package 10 = 10 v max 1 = single line f = flip chip 3 = lead-free, pitch = 400 m
LFTVS10-1F3 package information 5/7 3 package information in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at www.st.com . figure 11. flip chip dimensions 185 m 10 185 m 10 0.77 mm 30 m 0.77 mm 30 m 400 m 40 255 m 40 205 m 40 400 m 40 605 m 55 figure 12. footprint recommendations figure 13. marking 220 m recommended 220 m recommended 260 m maximum solder stencil opening: copper pad diameter: solder mask opening: 300 m minimum x y x w z w dot xx = marking yww = datecode (y = year ww = week) z = manufacturing location
ordering information LFTVS10-1F3 6/7 figure 14. flip chip tape and reel specifications note: more information is available in the application notes: an2348: ?400 m flip chip: package description and recommendations for use? an1751: "emi filters: recommendations and measurements" 4 ordering information 5 revision history user direction of unreeling all dimensions in mm 4.0 0.1 2.0 0.05 8.0 0.3 2.0 0.1 1.75 0.1 3.5 - 0.05 ? 1.55 0.05 0.69 0.05 0.20 0.05 0.87 0.87 xxz yww xxz yww xxz yww xxz yww xxz yww xxz yww xxz yww table 3. ordering information order code marking package weight base qty delivery mode LFTVS10-1F3 en flip chip 0.86 mg 10 000 tape and reel (7?) table 4. document revision history date revision changes 21-nov-2008 1 initial release.
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